1. Field of the Invention
The invention lies in the field of semiconductor technology. More specifically, the present invention relates to a method for fabricating a semiconductor insulation layer and a semiconductor component with the semiconductor insulation layer.
In state of the art technology, insulation layers on substrates in semiconductor components are fabricated by an extensive array of different technologies. Two examples thereof are the LOCOS technology and the STI (Shallow Trench Isolation) technology. In this context, the term substrate should be understood to mean any support, and not merely a wafer substrate. A substrate, as meant herein, may therefore be a wafer substrate, an epitaxial structure, a well in a wafer substrate, a circuit in a wafer substrate, etc.
A disadvantageous fact that has come to light in the case of the prior art approaches noted above is that they require a high process outlay and the insulation layer is frequently susceptible to shear tension and stress within itself and with respect to the substrate; the latter applies in particular to LOCOS technology.